Error detection and error correction are techniques that enable reliable delivery of digital data. Error detection techniques allow detecting such errors while error correction enables reconstruction of the original data. Errors in digital data may occur during transmission of digital data over a communications channel or may occur in a memory element. For example, the failure of on-chip non-volatile memory cells is increasing in part due to the small feature sizes used in the fabrication of integrated circuit.
Because memory cells are becoming unreliable, data stored (written) into memory is often encoded before the data is stored in memory. The encoding of the data creates extra bits that are also stored in memory. These extra bits are then used to detect and/or correct errors in the data read from the memory.
There are several ways that information (addresses, data, commands, responses) may be encoded to correct error(s) that occur. For example, an Error Correcting Code (ECC) may be used. ECC is a code in which data being transmitted or written conforms to specific rules of construction so that departures from this construction in the received or read data may be detected and/or corrected. Some ECC codes can detect a certain number of bit errors and correct a smaller number of bit errors. Codes which can correct one error are termed single error correcting (SEC), and those which detect two are termed double error detecting (DED). A Hamming code, for example, may correct single-bit errors and detect double-bit errors (SEC-DED). More sophisticated codes correct and detect even more errors. Examples of error correction code include Hamming code, Reed-Solomon code, Reed-Muller code and Binary Golay code.
Additional circuitry is needed to implement ECC on an integrated circuit. The additional circuitry increases the time required to write and read data to and from a memory array. Increasing the times to read and write to a memory array can slow the performance of an integrated circuit. Therefore it is important to keep the increase in time due to additional circuitry being added for ECC to a minimum.